meta-riscv

This is the general hardware specific BSP overlay for the RISC-V based devices. More information can be found at: https://riscv.org/ (Official Site)

Setup information

Git repository

https://github.com/riscv/meta-riscv web repo

Last commit: 2 days, 3 hours ago (master branch)

Maintainer

Dependencies

The meta-riscv layer depends upon:

Recipe name Version Description
gdb riscv GNU debugger
gdb-cross-canadian-i586 riscv GNU debugger (cross-canadian gdb for i586 target)
gdb-cross-i586 riscv GNU debugger
libffi 3.3-rc0 A portable foreign function interface library
linux-mainline 5.1+gitX Linux kernel
linux-riscv 5.0+gitX Linux kernel
opensbi 0.3 RISC-V Open Source Supervisor Binary Interface (OpenSBI)
riscv-fesvr 1.0 RISC-V Front-end Server
riscv-initramfs-image 1.0 initramfs image to be used together with SiFive Unleashed board as the board currently only supports booting from a ramdisk image
riscv-spike 1.0 RISC-V Spike ISA Simulator
baremetal-riscv32 a generic riscv32
baremetal-riscv64 a generic riscv64
freedom-u540 HiFive Unleashed development board
qemuriscv32 a generic riscv32
qemuriscv64 a generic riscv64