This is the general hardware specific BSP overlay for the RISC-V based devices. More information can be found at: (Official Site)

Setup information

Git repository web repo

Last commit: 3 weeks, 4 days ago (master branch)



The meta-riscv layer depends upon:

Recipe name Version Description
libffi 3.3-rc0 A portable foreign function interface library
linux-mainline 5.1.x+gitX Linux kernel
opensbi 0.3 RISC-V Open Source Supervisor Binary Interface (OpenSBI)
riscv-fesvr 1.0 RISC-V Front-end Server
riscv-initramfs-image 1.0 initramfs image to be used together with SiFive Unleashed board as the board currently only supports booting from a ramdisk image
riscv-spike 1.0 RISC-V Spike ISA Simulator
baremetal-riscv32 a generic riscv32
baremetal-riscv64 a generic riscv64
freedom-u540 HiFive Unleashed development board
qemuriscv32 a generic riscv32
qemuriscv64 a generic riscv64
Date/time Errors Warnings
May 21, 2019, 6:05 p.m.