meta-riscv

This is the general hardware specific BSP overlay for the RISC-V based devices. More information can be found at: https://riscv.org/ (Official Site)

Setup information

Git repository

https://github.com/riscv/meta-riscv web repo

Last commit: 1 year ago (kirkstone branch)

Maintainer

Recipe name Version Description
boot0 1.0+gitX Mainline friendly Secondary Program Loader for Allwinner D1
linux-firmware-beaglev-bcm43430 1.0 WIFI/BT Binary Blobs
linux-mainline 5.17++gitX Linux kernel
linux-nezha-dev 5.16.0+gitX Nezha dev kernel recipe
linux-starfive 5.12.10+gitX Linux kernel
linux-starfive-dev 6.0.0+gitX BeagleV dev kernel recipe
openocd
riscv-fesvr 1.0 RISC-V Front-end Server
riscv-initramfs-image 1.0 initramfs image to be used together with SiFive Unleashed board as the board currently only supports booting from a ramdisk image
riscv-spike 1.0 RISC-V Spike ISA Simulator
u-boot-nezha 1.0 Universal Boot Loader for embedded devices
u-boot-starfive v2021.07 Universal Boot Loader for embedded devices
baremetal-riscv32 a generic riscv32
baremetal-riscv32nf a generic riscv32 without FP
baremetal-riscv64 a generic riscv64
beaglev-starlight-jh7100 beta BeagleV Starlight board
freedom-u540 HiFive Unleashed development board
nezha-allwinner-d1 Nezha board
visionfive VisionFive board